d-Matrix, a U.S. startup designing AI inference chips, announced on the 10th (local time) that it will connect its next-generation accelerator, the “Raptor XPU,” through NVIDIA’s NVLink Fusion.
The company has drawn additional attention because Korean investors have backed it for the past four years.
Key points
▶ U.S. AI inference-chip design startup d-Matrix will connect its next-generation accelerator, the “Raptor XPU,” through NVIDIA’s NVLink Fusion.
▶ The first shipment of products integrated into NVIDIA MGX racks is targeted for the fourth quarter of 2027.
▶ d-Matrix was founded in 2019. In November 2025, it raised $275 million in a Series C round, giving it a valuation of $2 billion. Its cumulative funding has reached $450 million.
▶ SK hynix participated in d-Matrix’s $44 million Series A round in April 2022. According to Crunchbase, Samsung Venture Investment and Mirae Asset participated in the $110 million Series B round in September 2023. Mirae Asset also took part in the Series C round.
◆ How NVIDIA is bringing inference-chip designers into its ecosystem
NVLink Fusion is a standard that enables chips designed by other companies to connect with NVIDIA GPUs, CPUs, and network infrastructure. Through the standard, d-Matrix will attach its XPU to NVIDIA’s rack-scale infrastructure. The company said NVLink Fusion provides a “mature, high-bandwidth, low-latency scaling foundation.”
XPU refers to a computing chip optimized for specific workloads. In data centers, general-purpose GPUs handle training, while inference—the process of running completed models to generate responses—is increasingly being assigned to dedicated chips. Rather than blocking this trend, NVIDIA has chosen to bring it into its own ecosystem.
“NVLink Fusion enables partners to integrate custom silicon into NVIDIA’s extensive ecosystem,” NVIDIA founder and CEO Jensen Huang said in a statement. Sid Sheth, co-founder and CEO of d-Matrix, said, “This collaboration with NVIDIA is a pivotal moment in our journey toward inference at infinite scale that is accessible to everyone.”
The Raptor XPU is the successor to the Corsair XPU, which is currently in mass production. It uses 3D DRAM stacking technology, packaging DRAM memory chips and SRAM compute chips together in a single two-layer structure. The first shipment of products integrated into NVIDIA MGX racks is targeted for the fourth quarter of 2027.
◆ Memory walls and 3DIMC: Technology Korea recognized early
d-Matrix is a fabless company founded in 2019. In November 2025, it raised $275 million in a Series C round, giving it a valuation of $2 billion. Its cumulative funding has reached $450 million. The round was co-led by Bullhound Capital, Triatomic Capital, and Temasek, with participation from the Qatar Investment Authority, Microsoft’s venture fund M12, and Mirae Asset.
Korean capital entered the company much earlier. SK hynix participated in d-Matrix’s $44 million Series A round in April 2022. The round was led by Playground Global, with participation from M12 and Marvell Technology, among others.
According to Crunchbase, Samsung Venture Investment and Mirae Asset participated in the $110 million Series B round led by Temasek in September 2023. Samsung Venture Investment is an investment company whose shares are held by Samsung affiliates.
Memory companies’ early investment in the semiconductor design startup was partly driven by d-Matrix’s memory technology. DIMC integrates computing functions into memory, while 3DIMC vertically stacks memory directly on top of a compute die.
As AI models grow larger, the power and time required to move data from memory to computing devices increase. The phenomenon in which data movement, rather than computing performance, becomes the bottleneck is known as the “memory wall.”
HBM exchanges data horizontally with a GPU through an interposer. 3DIMC seeks to eliminate even the lateral distance data must travel by attaching memory vertically to the compute die.
In its own materials, d-Matrix said it is targeting 10 times the memory bandwidth and 10 times the energy efficiency of HBM4 when running inference with 3DIMC. Last year, the company announced that Pavehawk, which it described as the world’s first 3DIMC silicon, had begun operating in a laboratory.
d-Matrix presents 3DIMC as an alternative to HBM4. However, the three major Korean memory makers are not relying on HBM alone; they are developing a range of AI memory technologies, including AI DRAM, 3D DRAM, and processing-in-memory technology that performs computations within memory.
◆ Samsung also invests in Dutch startup Euclyd
On the 14th (local time), Samsung co-led a $231 million Series A round for Euclyd, a Dutch AI inference-chip startup. The round was also co-led by Somerset Capital Partners, the ScaleUp Europe Fund managed by EQT, and Innovation Industries, with participation from imec.xpand and others.
Euclyd was founded in 2024 in Eindhoven, the Netherlands. Like d-Matrix, it designs chips for AI inference. Co-founder and CEO Bernardo Kastrup previously worked as a technology strategist at ASML and co-founded Silicon Hive, which was acquired by Intel. Peter Wennink, the former CEO of ASML, joined the company as chairman of the board alongside the funding round.
Euclyd is developing an inference product called CRAFTWERK. The company claims that it offers up to 100 times greater power efficiency than NVIDIA’s Vera Rubin, but this is an internal projection that has not been validated at commercial scale. It is targeting supplies to enterprise customers in 2027, the launch of physical rack systems in 2028, and delivery to thousands of companies by 2030.
For Samsung, the investment represents an opportunity to secure a next-generation European AI semiconductor customer for both its foundry and memory businesses. However, the specific details and volume of any foundry agreement between Samsung and Euclyd have not been disclosed.